Industry Overview
The manufacture of semiconductors consists of more than 400 steps, according to Semiconductor Equipment and Materials International (SEMI), the global trade association that represents the semiconductor and flat panel display equipment and materials industries. To yield a properly functioning device at the end, each and every step must be executed with absolute precision.
Improvements in circuit complexity and performance can often be attributed to the “front-end” process steps in which the circuits are built into the silicon wafer with ever-increasing complexity and decreasing line widths. However, with the proliferation of cell phones and other handheld portable devices, the emphasis is shifting toward the “back-end” process steps, which are responsible for packaging the devices into ever-decreasing footprints. The end-user product is more affected by the quality and density of the packaging and interconnects than the performance of the individual devices. The “back end” is sometimes referred to as test, assembly and packaging, or TAP. The first diagram above shows the conventional TAP process flow and where the ALPS product from Kinesys is used.
The 1990s saw the evolution of sophisticated manufacturing execution software (MES) systems aimed at automating the “front end” of the semiconductor manufacturing process. The new decade will see the same transition occur in the “back end”.
KINESYS Software draws on experience acquired in more than 20 years in “front-end” automation to address the challenges that this transition will involve in the “back end”. KINESYS has chosen “inkless assembly” as a focus area in the “back end” of semiconductor manufacturing that is sorely in need of automation.
Inkless assembly uses computer-generated wafer maps instead of ink to classify good and bad die on a wafer. A wafer map is an electronic representation of the probe results of the die at wafer sort. One particular problem that KINESYS has addressed is the reliable routing of these wafer maps to the destination at the assembly site and their translation into a suitable (SEMI standard) format for use by the assembly equipment.
Today’s most advanced packages cannot tolerate ink as a contaminant in the process. Furthermore, inkless assembly allows devices of each price/performance point to be picked and sold for the maximum price (sometimes referred to as “cherry picking”), thereby maximizing revenue per wafer. Picking dies without having to detect the ink dots reduces cycle time and therefore cost, especially for low-yield wafers. With these benefits available, it is not surprising that even those assembly sites not already using inkless assembly are evaluating it.
In the latest version, ALPS 3, the experience acquired in wafer mapping for inkless assembly with ALPS 2 is now being extended to address the "next big thing"; single device tracking (SDT). It is possible with ALPS to trace back the exact manufacturing environment experience by an individual device that may have failed at final test or even out in the field. In the case of field failures, it is possible to contain the extent of a product recall with potentially huge cost savings.
As a result of joint development projects with key semiconductor manufacturers and equipment suppliers, KINESYS is now well-positioned at the cusp of a new era in semiconductor manufacturing in which the need for highly effective data management and equipment integration will grow to meet the demands of the latest TAP processes and technologies.